| 1 | /** @file interrupts.h |
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| 2 | * @brief Interrupts and task information. |
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| 3 | */ |
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| 4 | |
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| 5 | /* Copyright (C) 2007 the NxOS developers |
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| 6 | * |
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| 7 | * See AUTHORS for a full list of the developers. |
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| 8 | * |
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| 9 | * Redistribution of this file is permitted under |
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| 10 | * the terms of the GNU Public License (GPL) version 2. |
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| 11 | */ |
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| 12 | |
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| 13 | #ifndef __NXOS_BASE_INTERRUPTS_H__ |
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| 14 | #define __NXOS_BASE_INTERRUPTS_H__ |
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| 15 | |
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| 16 | #include "base/types.h" |
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| 17 | |
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| 18 | /** @addtogroup kernel */ |
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| 19 | /*@{*/ |
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| 20 | |
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| 21 | /** @defgroup interrupt Interrupts and task information |
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| 22 | * |
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| 23 | * The Baseplate provides facilities for enabling and disabling |
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| 24 | * interrupts, and for obtaining information about an interrupted user |
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| 25 | * task. |
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| 26 | * |
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| 27 | * The Baseplate itself provides no scheduler, but its interrupt |
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| 28 | * dispatch routine is tailored so that, when it interrupts code running |
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| 29 | * in User/System mode, all the state is saved to the User/System mode |
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| 30 | * stack. This makes the User/System mode task entirely self-contained |
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| 31 | * within its stack pointer, which can be exchanged trivially for |
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| 32 | * another to implement simple task switching. |
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| 33 | */ |
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| 34 | /*@{*/ |
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| 35 | |
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| 36 | /** Globally disable interrupt handling. |
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| 37 | * |
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| 38 | * This function call can be nested. Internally, a counter counts the |
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| 39 | * number of disables, and will require the same number of calls to |
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| 40 | * nx_interrupts_enable() to reenable interrupt handling. |
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| 41 | * |
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| 42 | * @note Application kernels enter the main() function with interrupts |
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| 43 | * already enabled. |
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| 44 | * |
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| 45 | * @warning The NXT cannot function for more than about a millisecond |
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| 46 | * with interrupts disabled. Disabling them for too long will cause the |
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| 47 | * coprocessor link to fail, which will bring the whole system crashing |
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| 48 | * down. Use sparingly, for small critical sections. |
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| 49 | * |
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| 50 | * @sa nx_interrupts_enable |
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| 51 | */ |
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| 52 | void nx_interrupts_disable(void); |
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| 53 | |
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| 54 | /** Enable interrupt handling. |
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| 55 | * |
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| 56 | * Interrupt handling will only be reenabled if this function has been |
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| 57 | * called the same number of times as nx_interrupts_disable(). |
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| 58 | */ |
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| 59 | void nx_interrupts_enable(void); |
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| 60 | |
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| 61 | /** @brief The mapping of a user task's registers in the User/System stack. |
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| 62 | * |
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| 63 | * This structure should be used in an interrupt handler: cast the |
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| 64 | * User/System stack pointer to a pointer to this structure, and |
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| 65 | * dereference the fields to access the values of registers. |
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| 66 | * |
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| 67 | * @note This structure only works for user tasks. It does not |
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| 68 | * accurately describe the content of any stack when there is no user |
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| 69 | * mode task running. |
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| 70 | */ |
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| 71 | typedef struct { |
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| 72 | U32 cpsr; /**< CPU status register. */ |
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| 73 | U32 pc; /**< Program Counter register. */ |
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| 74 | U32 r0; /**< General Purpose Register 0. */ |
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| 75 | U32 r1; /**< General Purpose Register 1. */ |
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| 76 | U32 r2; /**< General Purpose Register 2. */ |
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| 77 | U32 r3; /**< General Purpose Register 3. */ |
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| 78 | U32 r4; /**< General Purpose Register 4. */ |
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| 79 | U32 r5; /**< General Purpose Register 5. */ |
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| 80 | U32 r6; /**< General Purpose Register 6. */ |
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| 81 | U32 r7; /**< General Purpose Register 7. */ |
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| 82 | U32 r8; /**< General Purpose Register 8. */ |
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| 83 | U32 r9; /**< General Purpose Register 9. */ |
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| 84 | U32 r10; /**< General Purpose Register 10. */ |
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| 85 | U32 r11; /**< General Purpose Register 11. */ |
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| 86 | U32 r12; /**< General Purpose Register 12. */ |
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| 87 | U32 lr; /**< Link Register. */ |
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| 88 | } nx_task_stack_t; |
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| 89 | |
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| 90 | /*@}*/ |
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| 91 | /*@}*/ |
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| 92 | |
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| 93 | #endif /* __NXOS_BASE_INTERRUPTS_H__ */ |
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